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tda7344 digital controlled audio processor with surround sound matrix 1 stereo input volume control in 1.25db step treble and bass control three surround modes are avail- able: movie, music and simulated four speaker attenuators: 4 independent speakers control in 1.25db steps for balance facility independent mute function all functions programmable via se- rial bus description the tda7344 is a volume tone (bass and treble) balance (left/right) processor for quality audio applications in car radio and hi-fi systems. it reproduces surround sound by using phase shifters and a signal matrix. control of all the functions is accomplished by serial bus. the ac signal setting is obtained by resistor net- works and switches combined with operational amplifiers. thanks to the used bipolar/cmos technology, low distortion, low noise and dc stepping are obtained. february 1997 pin connections ordering numbers: tda7344p (pqfp44) TDA7344S (sdip42) pqfp44 (10 x 10) sdip42 1/20
block diagram tda7344 2/20
test circuit thermal data symbol description value unit r th j-pins thermal resistance junction-pins ma x. 85 c/w quick reference data symbol parameter min. typ. max. unit v s supply voltage 7 9 10.5 v v cl max. input signal handling 2 vrms thd total harmonic distortion v = 1vrms f = 1khz 0.02 0.1 % s/n signal to noise ratio v out = 1vrms (made = off) 106 db s c channel separation f = 1khz 70 db volume control 1.25db step -78.75 0 db treble control (2db step) -14 +14 db bass control (2db step) -14 +14 db balance control 1.25db step (l ch, r ch ) -38.75 0 db mute attenuation 90 db absolute maximum ratings symbol parameter value unit v s operating supply voltage 11 v t amb operating ambient temperature -10 to 85 c t stg storage temperature range -55 to +150 c tda7344 3/20
electrical characteristics (refer to the test circuit t amb =25 c, v s = 9v, r l = 10k w , r g = 600 w , all controls flat (g = 0),effect ctrl = -6db, mode = off; f = 1khz unless otherwise specified) symbol parameter test condition min. typ. max. unit supply v s supply voltage 7 9 10.5 v i s supply current 20 25 35 ma svr ripple rejection l ch /r ch out , mode = off 60 80 db input stage r ii input resistance 35 50 65 k w v cl clipping level thd = 0.3%; lin or rin 2 2.5 vrms thd = 0.3%; rin + lin (2) 3.0 vrms c range control range 19.68 db a vmin min. attenuation -1 0 1 db a vmax max. attenuation 18.68 19.68 20.68 db a step step resolution 0.11 0.31 0.51 db v dc dc steps adjacent att. step -3 0 3 mv volume control c range control range 70 75 db a vmin min. attenuation -1 0 1 db a vmax max. attenuation 70 75 db a step step resolution av = 0 to -40db 0.5 1.25 1.75 db e a attenuation set error av = 0 to -20db av = -20 to -60db -1.5 -3 0 1.5 2 db db e t tracking error 2db v dc dc steps adjacent attenuation steps from 0db to av max -3 -5 0 0.5 3 5 mv mv bass control (1) gb control range max. boost/cut +11.5 +14 +16 db b step step resolution 1 2 3 db r b internal feedback resistance 32 44 56 k w treble control (1) gt control range max. boost/cut +13 +14 +15 db t step step resolution 0.5 2 1.5 db effect control c range control range - 21 - 6 db s step step resolution 1 db tda7344 4/20
electrical characteristics (continued) surround sound matrix symbol parameter test condition min. typ. max. unit g off in-phase gain (off) mode off, input signal of 1khz, 1.4 v p-p ,r in r out l in l out -1.5 0 1.5 db d goff lr in-phase gain difference (off) mode off, input signal of 1khz, 1.4 v p-p (r in r out ), (l in l out ) -1.5 0 1.5 db g mov1 in-phase gain (movie 1) movie mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p r in r out ,l in l out 7db g mov2 in-phase gain (movie 2) movie mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p r in r out ,l in l out 8db d gmov lr in-phase gain diffrence (movie) movie mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p (r in r out )(l in l out ) 0db g mus1 in-phase gain (music 1) music mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p (r in r out )(l in l out ) 6db g mus2 in-phase gain (music 2) music mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p r in r out ,l in l out 7.5 db d gmus lr in-phase gain difference (music) music mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p (r in r out )(l in l out ) 0db l mon1 simulated l output 1 simulated mode, effectctrl = -6db input signal of 250hz, 1.4 v p-p ,r in and l in l ou t 4.5 db l mon2 simulated l output 2 simulated mode, effectctrl = -6db input signal of 1khz, 1.4 v p-p ,r in and l in l ou t 4.0 db l mon3 simulated l output 3 simulated mode, effectctrl = -6db input signal of 3.6khz, 1.4 v p-p ,r in and l in l ou t 7.0 db r mon1 simulated r output 1 simulated mode, effectctrl = -6db input signal of 250hz, 1.4 v p-p ,r in and l in r out 4.5 db r mon2 simulated r output 2 simulated mode, effectctrl = -6db input signal of 1khz, 1.4 v p-p ,r in and l in r out 3.8 db r mon3 simulated r output 3 simulated mode, effectctrl = -6db input signal of 3.6khz, 1.4 v p-p ,r in and l in r out 20 db r lp1 low pass filter resistance 7.5 10 12.5 k w r ps1 phase shifter 1 resistance 13.5 17.95 22.5 k w r ps2 phase shifter 2 resistance 0.3 0.4 0.5 k w r ps3 phase shifter 3 resistance 13.6 18.08 22.6 k w r ps4 phase shifter 4 resistance 13.6 18.08 22.6 k w r hpf high pass filter resistance 45 60 75 k w r lpf lp pin impedance 7.5 10 12.5 k w tda7344 5/20
electrical characteristics (continued) symbol parameter test condition min. typ. max. unit speaker attenuators c range control range 35 37.5 40 db s step step resolution 0.5 1.25 1.75 db e a attenuation set error -1.5 1.5 db a mute output mute attenuation 80 90 db v dc dc steps adjacent att. steps from 0 to mute 0 1 mv mv speaker attenuators aux c range control range 70 75 db s step step resolution av = 0 to -40db 0.5 1.25 1.75 db e a attenuation set error av = 0 to 20db -1.5 0 1.5 db av = -20 to -60db -3 0 2 db v dc dc steps adjacent att. steps -3 0 3 mv a mute output mute attenuation 80 90 db audio outputs v ocl clipping level d = 0.3% 2 2.5 vrms r out output resistance 100 200 300 w v out dc voltage level 4.2 4.5 4.8 v general n o(off) output noise (off) b w = 20hz to 20khz output r and l output aux r and l 8 15 15 30 m vrms m vrms n o(mov) output noise (movie) mode =movie , b w = 20hz to 20khz r out and l out measurement 30 m vrms n o(mus) output noise (music) mode = music , b w = 20hz to 20khz, r out and l out measurement 30 m vrms n o(mon) output noise (simulated) mode = simulated, b w = 20hz to 20khz r out and l out measurement 30 m vrms d distorsion av = 0 ; v in = 1vrms 0.02 0.1 % s c channel separation 60 70 db bus inputs v il input low voltage 1v v ih input high voltage 3 v i in input current -5 +5 m a v o output voltage sda acknowledge i o = 1.6ma 0.4 0.8 v note: (1) bass and treble response: the center frequency and the resonance quality can be choosen by the external circuitry. a standard first order bass response can be realized by a standard feedback network. (2) the peack voltage of the two input signals must be less then v s 2 : (lin + rin) peak ? a vin < v s 2 tda7344 6/20
i 2 c bus interface data transmission from microprocessor to the tda7344 and viceversa takes place through the 2 wires i 2 c bus interface, consisting of the two lines sda and scl (pull-up resistors to positive supply voltage must be connected). data validity as shown in fig. 3, the data on the sda line must be stable during the high period of the clock. the high and low state of the data line can only change when the clock signal on the scl line is low. start and stop conditions as shown in fig.4 a start condition is a high to low transition of the sda line while scl is high. the stop condition is a low to high tran- sition of the sda line while scl is high. byte format every byte transferred on the sda line must con- tain 8 bits. each byte must be followed by an ac- knowledge bit. the msb is transferred first. acknowledge the master ( m p) puts a resistive high level on the sda line during the acknowledge clock pulse (see fig. 5). the peripheral (audioprocessor) that ac- knowledges has to pull-down (low) the sda line during the acknowledge clock pulse, so that the sda line is stable low during this clock pulse. the audioprocessor which has been addressed has to generate an acknowledge after the recep- tion of each byte, otherwise the sda line remains at the high level during the ninth clock pulse time. in this case the master transmitter can gen- erate the stop information in order to abort the transfer. transmission without acknowledge avoiding to detect the acknowledge of the audio- processor, the m p can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. this approach of course is less protected from misworking and decreases the noise immunity. figure 3: data validity on the i 2 cbus figure 4: timing diagram of i 2 cbus f igure 5: acknowledge on the i 2 cbus tda7344 7/20
interface features - due to the fact that the msb is used to select if the byte transmitted is a subaddress (func- tion) or a data (value), between a start and stop condition, is possible to receive, how many subaddresses and datas as wanted. - the subaddress (function) is fixed until a new subaddress is transmitted, so the tda7344 can receive how many data as wanted for the selected subaddress (without the need for a new start condition) - if tda7344 receives a subaddress with the lsb = 1 the incremental bus is selected, so it enters in a loop condition that means that every acknowledge will increase automat- ically the subaddress (function) and it re- ceives the data related to the new subad- dress. examples 1) no incremental bus tda7344 receives a start condition, the correct chip address, a subaddress with the lsb = 0 (no incremental bus), n-datas (all these datas con- cern the subaddress selected), a new subad- dress, n-data, a stop condition. so it can receive in a single transmission how many subaddress are necessary, and for each subaddress how many data are necessary. 2) incremental bus tda7344 receives a start condition, the correct chip address a subaddress with the lsb = 1 (in- cremental bus): now it is in a loop condition with an autoincrease of the subaddress. the first data that it receives doesn't concern the subaddress sended but the next one, the second one concerns the subaddress sended plus two in the loop etc, and at the end it receives the stop condition. in the pictures there are some examples: s = start a chip address 0 80 (hex) 1 82 (hex) ack = acknowledge b = 1 incremental bus, b = 0 no incremental bus p = stop software specification interface protocol the interface protocol comprises: a start condition (s) a chip address byte, containing the tda7344 address (the 8th bit of the byte must be 0). the tda7344 must always acknowledge at the end of each transmitted byte. a subaddress (function) bytes (identified by the msb = 0) a sequence of dates and subaddresses (n bytes + achnowledge. the dates are identified by msb = 1, subaddresses by msb = 0) a stop condition (p) 1) one subaddress, with n data concerning that subaddress (no incremental bus) ack = achnowledge s = start p = stop tda7344 8/20
msb lsb subaddress a0 a1 a2 a3 b 0000xxxb volume attenuation & loudness 0100xxxbsur round & out & effect control 0010xxxb bass 0110xxxbt reble 0001xxxbatt speaker r 0101xxxbatt speaker l 0011xxxb att. r out aux 01110xxb att. l out aux 01111xxb input stage control b = 1 yes incremental bus; b = 0 no incremental bus; x = indifferent 0,1 the first byte select the function, it is identified by the msb = 0 data bytes function selection first byte (subaddress) 2) one subaddress, (with incremental bus) , with n data (data1 that concerns subaddress +1, data 2 that concerns subaddress + 2 etc.) 3) more subaddress with more data tda7344 9/20
volume attenuation msb lsb 1.25 db steps 1 000 0 1 0 0 1 -1.25 1 0 1 0 -2.50 1 0 1 1 -3.75 1 1 0 0 -5.00 1 1 0 1 -6.25 1 1 1 0 -7.50 1 1 1 1 -8.75 10 db steps 1 000 0 1 001 -10 1 010 -20 1 011 -30 1 100 -40 1 101 -50 1 110 -60 1 111 -70 selection loudness 10 on 11 off att aux out1 and 2 msb lsb 1.25 db steps 1 000 0 1 0 0 1 -1.25 1 0 1 0 -2.50 1 0 1 1 -3.75 1 1 0 0 -5.00 1 1 0 1 -6.25 1 1 1 0 -7.50 1 1 1 1 -8.75 10 db steps 1 000 0 1 001 -10 1 010 -20 1 011 -30 1 100 -40 1 101 -50 1 110 -60 1 111 -70 mute 10 off 11 on value selection the second byte select the value, it is identified by the msb = 1 tda7344 10/20
att speaker r and l msb lsb 1.25 db steps 1xx 000 0 1 x x 0 0 1 -1.25 1 x x 0 1 0 -2.50 1 x x 0 1 1 -3.75 1 x x 1 0 0 -5.00 1 x x 1 0 1 -6.25 1 x x 1 1 0 -7.50 1 x x 1 1 1 -8.75 10 db steps 1xx00 0 1 x x 0 1 -10 1 x x 1 0 -20 1 x x 1 1 -30 1xx11111 mute treble/ bass msb lsb 2 db steps 1xxx0111 14 1xxx0110 12 1xxx0101 10 1xxx0100 8 1xxx0011 6 1xxx0010 4 1xxx0001 2 1xxx0000 0 1xxx1000 0 1xxx1001 -2 1xxx1010 -4 1xxx1011 -6 1xxx1100 -8 1xxx1101 -10 1xxx1110 -12 1xxx1111 -14 tda7344 11/20
surround & out & effect control msb lsb selection selection surround 1 0 0 simulated 1 0 1 music 1 1 0 movie 1 1 1 off selection out 1 0 out var 1 1 out fix selection effect control 10000 -6 10001 -7 10010 -8 10011 -9 10100 -10 10101 -11 10110 -12 10111 -13 11000 -14 11001 -15 11010 -16 11011 -17 11100 -18 11101 -19 11110 -20 11111 -21 for example to select the music mode, out fix, effect control =-9db: 10011101 tda7344 12/20
input control range (0 to -19.68db) msb lsb 0.3125 db steps 1x 000 0 1 xx 0 0 1 -0.3125 1 x 0 1 0 -0.625 1 x 0 1 1 -0.9375 1 x 1 0 0 -1.25 1 x 1 0 1 -1.5625 1 x 1 1 0 -1.875 1 x 1 1 1 -2.1875 2.5 db steps 1x000 0 1 x 0 0 1 -2.5 1 x 0 1 0 -5.0 1 x 0 1 1 -7.5 1x100 -10 1 x 1 0 1 -12.5 1x110 -15 1 x 1 1 1 -17.5 power on reset volume attenuation max attenuation, loudness off treble -14db bass -14db surround & out control + effect control off + fix + max attenuation att speaker r mute att speaker l mute att aux out 1 mute att aux out 2 mute tda7344 13/20
pin: l oud -r ,l oub-l pin: l in ,r in pin: ac - l in , ac - r in , pin: ac - l o ,ac-r o , pin: hp1 pin: hp2 tda7344 14/20
pin: var o - l, var o -r pin: treble - l, treble - r pin: l out , r out ,l out aux, r out aux, rear pin: var i - l, var i -r pin: bass - la, bass - ra pin: bass - lb, bass - rb tda7344 15/20
pin: ps3, ps2 pin: lp pin: c ref pin: ps3a, ps4a pin: scl, sda pin: addr tda7344 16/20
pin: ps1a pin: ps1 pin: lp1 pin: ps2 pin: ps2a tda7344 17/20
a a2 a1 b seating plane c 11 12 22 23 33 34 44 e3 d3 e1 e d1 d e 1 k b pqfp44 l l1 0.10mm .004 pqfp44 package mechanical data dim. mm inch min. typ. max. min. typ. max. a 2.45 0.096 a1 0.25 0.010 a2 1.95 2.00 2.10 0.077 0.079 0.083 b 0.30 0.45 0.012 0.018 c 0.13 0.23 0.005 0.009 d 12.95 13.20 13.45 0.51 0.52 0.53 d1 9.90 10.00 10.10 0.390 0.394 0.398 d3 8.00 0.315 e 0.80 0.031 e 12.95 13.20 13.45 0.510 0.520 0.530 e1 9.90 10.00 10.10 0.390 0.394 0.398 e3 8.00 0.315 l 0.65 0.80 0.95 0.026 0.031 0.037 l1 1.60 0.063 k0 (min.), 7 (max.) tda7344 18/20
a1 be b1 d 22 21 42 1 la e1 a2 c e1 e e2 gage plane .015 0,38 e2 e3 e sdip42 sdip42 package mechanical data dim. mm inch min. typ. max. min. typ. max. a 5.08 0.20 a1 0.51 0.020 a2 3.05 3.81 4.57 0.120 0.150 0.180 b 0.38 0.46 0.56 0.0149 0.0181 0.0220 b1 0.89 1.02 1.14 0.035 0.040 0.045 c 0.23 0.25 0.38 0.0090 0.0098 0.0150 d 36.58 36.83 37.08 1.440 1.450 1.460 e 15.24 16.00 0.60 0.629 e1 12.70 13.72 14.48 0.50 0.540 0.570 e 1.778 0.070 e1 15.24 0.60 e2 18.54 0.730 e3 1.52 0.060 l 2.54 3.30 3.56 0.10 0.130 0.140 tda7344 19/20
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs- thomson microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of sgs-thomson microelectronics. ? 1997 sgs-thomson microelectronics printed in italy all rights reserved sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. tda7344 20/20

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